New Instruction Sets in AMD Bulldozer

What are the new instructions sets supported by Bulldozer ?

The new bulldozer instruction set is compatible with the older instruction sets. Besides, that it adds supports to the newer instruction sets

AVX (Advanced Vector Extensions)

The AMD’s AVX ( Advanced Vector Extension) set runs in parallel with the Intel’s SSE5 instruction set. These instruction sets are supported by the Sandy Bridge Architecture as well.

The basic concept of the AVX is to use a very large register to store a large number of the small size data and process all of them is a single stroke with a single instruction that we call the AVX instruction. This gives sincere boost to the execution time.

There are 12 new instructions in the bulldozer architecture and. There is an increase in the size from 128 bits to 256 bits in the XMM register.

The first of these are the SSE4.1 and SSE4.2. The present AMD architecture does not has the support for the SSE4 instructions. The SSE4 instruction sets will give a boost to the execution of the multimedia based applications. We should therefore see an increase in the image and video processing.

Current AMD processors have the support only for the proprietary SSE4.a instructions sets.





AES (Advanced Encryption Standard)

The AES instructions is used for encryption. The AES instructions earlier created a difference in the benchmarking results between the AMD and the Intel. Intel already has the support for the AES instructions for most of its processors.


LWP (Light Weight Profiling)

The new LWP instructions is used to monitor the performance of the software. These instructions will be used by the developers for monitoring the performance of the software.

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